SRAM(Static Random Access Memory)is widely used in all kinds of systems that need fast data access because of its high speed and high performance.According to the different working timing control methods,SRAM can be mainly divided into asynchronous SRAM and synchronous SRAM.

 

The address,data input and other control signals of synchronous SRAM are all related to the clock signal.All operations of synchronous SRAM are synchronized with the edge(rising edge or falling edge)of the clock signal.Its address,input data,control signal,etc.are all sampled or output when the clock jumps,which enables it to be embedded in synchronous digital systems more accurately,especially for high-speed and pipeline data access scenarios.

 

The access of asynchronous SRAM is independent of the clock,and the data input and output are controlled by the change of address.The access process of asynchronous SRAM does not depend on a unified clock signal,and its data reading and writing operations are mainly triggered by the change of address signals.This means that the control logic is relatively simple,and the interface timing is relatively loose,so it is suitable for occasions where real-time requirements are not extremely high,but different clock domain systems need to be flexibly connected.Asynchronous SRAM is commonly used in some early or low-speed microprocessor extended storage,industrial control equipment and communication buffering applications.


Keywords : SRAM